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Searched refs:SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7480 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK 0x00003c00L macro
H A Dgfx_7_2_sh_mask.h9259 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK 0x3c00 macro
H A Dgfx_8_0_sh_mask.h10979 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK 0x3c00 macro
H A Dgfx_8_1_sh_mask.h11377 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK 0x3c00 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20258 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK … macro
H A Dgc_9_1_sh_mask.h21694 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK … macro
H A Dgc_9_2_1_sh_mask.h21624 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT_MASK … macro