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Searched refs:SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7483 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT 0x00000009 macro
H A Dgfx_7_2_sh_mask.h9258 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT 0x9 macro
H A Dgfx_8_0_sh_mask.h10978 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT 0x9 macro
H A Dgfx_8_1_sh_mask.h11376 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT 0x9 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h20246 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT … macro
H A Dgc_9_1_sh_mask.h21682 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h21612 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_MODE__SHIFT … macro