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Searched refs:SPI_DEBUG_CNTL__DEBUG_SIMD_SEL_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7562 #define SPI_DEBUG_CNTL__DEBUG_SIMD_SEL_MASK 0x0000fc00L macro
H A Dgfx_7_2_sh_mask.h9137 #define SPI_DEBUG_CNTL__DEBUG_SIMD_SEL_MASK 0xfc00 macro
H A Dgfx_8_0_sh_mask.h10847 #define SPI_DEBUG_CNTL__DEBUG_SIMD_SEL_MASK 0xfc00 macro
H A Dgfx_8_1_sh_mask.h11245 #define SPI_DEBUG_CNTL__DEBUG_SIMD_SEL_MASK 0xfc00 macro