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Searched refs:SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7614 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK 0x000003ffL macro
H A Dgfx_7_2_sh_mask.h9187 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK 0x3ff macro
H A Dgfx_8_0_sh_mask.h10907 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK 0x3ff macro
H A Dgfx_8_1_sh_mask.h11305 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK 0x3ff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21465 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_1_sh_mask.h22901 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK … macro
H A Dgc_9_2_1_sh_mask.h22868 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2_MASK … macro