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Searched refs:SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7615 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h9188 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10908 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h11306 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21461 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
H A Dgc_9_1_sh_mask.h22897 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22864 #define SPI_PERFCOUNTER0_SELECT1__PERF_SEL2__SHIFT … macro