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Searched refs:SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7630 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK 0x000ffc00L macro
H A Dgfx_7_2_sh_mask.h9193 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK 0xffc00 macro
H A Dgfx_8_0_sh_mask.h10913 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK 0xffc00 macro
H A Dgfx_8_1_sh_mask.h11311 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK 0xffc00 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21475 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK … macro
H A Dgc_9_1_sh_mask.h22911 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK … macro
H A Dgc_9_2_1_sh_mask.h22878 #define SPI_PERFCOUNTER1_SELECT1__PERF_SEL3_MASK … macro