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Searched refs:SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7663 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT 0x0000000a macro
H A Dgfx_7_2_sh_mask.h9184 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h10904 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h11302 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT 0xa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21451 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT … macro
H A Dgc_9_1_sh_mask.h22887 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22854 #define SPI_PERFCOUNTER3_SELECT__PERF_SEL1__SHIFT … macro