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Searched refs:SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9203 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h10923 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h11321 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK 0xff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21498 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK … macro
H A Dgc_9_1_sh_mask.h22934 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK … macro
H A Dgc_9_2_1_sh_mask.h22901 #define SPI_PERFCOUNTER4_SELECT__PERF_SEL_MASK … macro