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Searched refs:SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9848 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
H A Dgfx_8_1_sh_mask.h10246 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT 0x15 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15714 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT … macro
H A Dgc_9_1_sh_mask.h17148 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17023 #define SPI_PS_INPUT_CNTL_12__DEFAULT_VAL_ATTR1__SHIFT … macro