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Searched refs:SPI_PS_INPUT_CNTL_15__DUP__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7799 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT 0x00000012 macro
H A Dgfx_7_2_sh_mask.h8492 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT 0x12 macro
H A Dgfx_8_0_sh_mask.h9914 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT 0x12 macro
H A Dgfx_8_1_sh_mask.h10312 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT 0x12 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15786 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT macro
H A Dgc_9_1_sh_mask.h17220 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT macro
H A Dgc_9_2_1_sh_mask.h17095 #define SPI_PS_INPUT_CNTL_15__DUP__SHIFT macro