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Searched refs:SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7819 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h8512 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h9958 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h10356 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15834 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro
H A Dgc_9_1_sh_mask.h17268 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17143 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro