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Searched refs:SPI_PS_INPUT_CNTL_27__DUP__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7925 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT 0x00000012 macro
H A Dgfx_7_2_sh_mask.h8604 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT 0x12 macro
H A Dgfx_8_0_sh_mask.h10156 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT 0x12 macro
H A Dgfx_8_1_sh_mask.h10554 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT 0x12 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16042 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT … macro
H A Dgc_9_1_sh_mask.h17476 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17351 #define SPI_PS_INPUT_CNTL_27__DUP__SHIFT … macro