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Searched refs:SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10650 #define SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT 0xf macro
H A Dgfx_8_1_sh_mask.h11048 #define SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT 0xf macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12521 #define SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT … macro
H A Dgc_9_1_sh_mask.h13950 #define SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13815 #define SPI_RESOURCE_RESERVE_CU_12__BARRIERS__SHIFT … macro