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Searched refs:SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10777 #define SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h11175 #define SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12565 #define SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK … macro
H A Dgc_9_1_sh_mask.h13994 #define SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h13859 #define SPI_RESOURCE_RESERVE_EN_CU_12__EN_MASK … macro