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Searched refs:SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h11373 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK 0x3f0000 macro
H A Dgfx_8_0_sh_mask.h13101 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK 0x3f0000 macro
H A Dgfx_8_1_sh_mask.h13499 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK 0x3f0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h9656 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK … macro
H A Dgc_9_1_sh_mask.h11274 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK … macro
H A Dgc_9_2_1_sh_mask.h11063 #define SPI_SHADER_PGM_RSRC3_GS__WAVE_LIMIT_MASK … macro