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Searched refs:SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h291 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x00000004 macro
H A Dsmu_7_0_0_sh_mask.h216 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro
H A Dsmu_7_1_1_sh_mask.h206 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro
H A Dsmu_7_0_1_sh_mask.h206 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro
H A Dsmu_7_1_0_sh_mask.h206 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro
H A Dsmu_7_1_2_sh_mask.h206 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro
H A Dsmu_7_1_3_sh_mask.h232 #define SPLL_CNTL_MODE__SPLL_ENSAT__SHIFT 0x4 macro