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Searched refs:SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8706 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK 0xffff0000L macro
H A Dgfx_7_2_sh_mask.h12075 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK 0xffff0000 macro
H A Dgfx_8_0_sh_mask.h13927 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK 0xffff0000 macro
H A Dgfx_8_1_sh_mask.h14325 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK 0xffff0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h25961 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK … macro
H A Dgc_9_1_sh_mask.h27369 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK … macro
H A Dgc_9_2_1_sh_mask.h27608 #define SQ_ALU_CLK_CTRL__FORCE_CU_ON_SH1_MASK … macro