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Searched refs:SQ_DEBUG_STS_GLOBAL3__FIFO_LEVEL_HOST_REG__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8811 #define SQ_DEBUG_STS_GLOBAL3__FIFO_LEVEL_HOST_REG__SHIFT 0x00000004 macro
H A Dgfx_7_2_sh_mask.h12646 #define SQ_DEBUG_STS_GLOBAL3__FIFO_LEVEL_HOST_REG__SHIFT 0x4 macro
H A Dgfx_8_0_sh_mask.h14532 #define SQ_DEBUG_STS_GLOBAL3__FIFO_LEVEL_HOST_REG__SHIFT 0x4 macro
H A Dgfx_8_1_sh_mask.h14930 #define SQ_DEBUG_STS_GLOBAL3__FIFO_LEVEL_HOST_REG__SHIFT 0x4 macro