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Searched refs:SQ_DPP_ROW_SL10 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_enum.h3555 #define SQ_DPP_ROW_SL10 0x10a macro
H A Dgfx_8_1_enum.h3573 #define SQ_DPP_ROW_SL10 0x10a macro
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h18184 #define SQ_DPP_ROW_SL10 0x0000010a macro