Home
last modified time | relevance | path

Searched refs:SQ_DS_0__OFFSET1__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8845 #define SQ_DS_0__OFFSET1__SHIFT 0x00000008 macro
H A Dgfx_7_2_sh_mask.h13166 #define SQ_DS_0__OFFSET1__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h15076 #define SQ_DS_0__OFFSET1__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h15474 #define SQ_DS_0__OFFSET1__SHIFT 0x8 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2563 #define SQ_DS_0__OFFSET1__SHIFT macro
H A Dgc_9_1_sh_mask.h2512 #define SQ_DS_0__OFFSET1__SHIFT macro
H A Dgc_9_2_1_sh_mask.h2470 #define SQ_DS_0__OFFSET1__SHIFT macro