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Searched refs:SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h8882 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK 0x000c0000L macro
H A Dgfx_7_2_sh_mask.h11755 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK 0xc0000 macro
H A Dgfx_8_0_sh_mask.h13557 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK 0xc0000 macro
H A Dgfx_8_1_sh_mask.h13955 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK 0xc0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2064 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h2013 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h2036 #define SQ_FIFO_SIZES__VMEM_DATA_FIFO_SIZE_MASK … macro