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Searched refs:SQ_MTBUF_0__IDXEN__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9113 #define SQ_MTBUF_0__IDXEN__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h13038 #define SQ_MTBUF_0__IDXEN__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h14946 #define SQ_MTBUF_0__IDXEN__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h15344 #define SQ_MTBUF_0__IDXEN__SHIFT 0xd macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2695 #define SQ_MTBUF_0__IDXEN__SHIFT … macro
H A Dgc_9_1_sh_mask.h2644 #define SQ_MTBUF_0__IDXEN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2602 #define SQ_MTBUF_0__IDXEN__SHIFT … macro