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Searched refs:SQ_MTBUF_1__VADDR_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9130 #define SQ_MTBUF_1__VADDR_MASK 0x000000ffL macro
H A Dgfx_7_2_sh_mask.h12951 #define SQ_MTBUF_1__VADDR_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h14835 #define SQ_MTBUF_1__VADDR_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h15233 #define SQ_MTBUF_1__VADDR_MASK 0xff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2716 #define SQ_MTBUF_1__VADDR_MASK … macro
H A Dgc_9_1_sh_mask.h2665 #define SQ_MTBUF_1__VADDR_MASK … macro
H A Dgc_9_2_1_sh_mask.h2623 #define SQ_MTBUF_1__VADDR_MASK … macro