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Searched refs:SQ_MUBUF_0__GLC__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9139 #define SQ_MUBUF_0__GLC__SHIFT 0x0000000e macro
H A Dgfx_7_2_sh_mask.h13004 #define SQ_MUBUF_0__GLC__SHIFT 0xe macro
H A Dgfx_8_0_sh_mask.h14888 #define SQ_MUBUF_0__GLC__SHIFT 0xe macro
H A Dgfx_8_1_sh_mask.h15286 #define SQ_MUBUF_0__GLC__SHIFT 0xe macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2726 #define SQ_MUBUF_0__GLC__SHIFT … macro
H A Dgc_9_1_sh_mask.h2675 #define SQ_MUBUF_0__GLC__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2633 #define SQ_MUBUF_0__GLC__SHIFT … macro