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Searched refs:SQ_MUBUF_1__TFE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9157 #define SQ_MUBUF_1__TFE__SHIFT 0x00000017 macro
H A Dgfx_7_2_sh_mask.h12980 #define SQ_MUBUF_1__TFE__SHIFT 0x17 macro
H A Dgfx_8_0_sh_mask.h14862 #define SQ_MUBUF_1__TFE__SHIFT 0x17 macro
H A Dgfx_8_1_sh_mask.h15260 #define SQ_MUBUF_1__TFE__SHIFT 0x17 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2743 #define SQ_MUBUF_1__TFE__SHIFT macro
H A Dgc_9_1_sh_mask.h2692 #define SQ_MUBUF_1__TFE__SHIFT macro
H A Dgc_9_2_1_sh_mask.h2650 #define SQ_MUBUF_1__TFE__SHIFT macro