Home
last modified time | relevance | path

Searched refs:SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9175 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT 0x0000000c macro
H A Dgfx_7_2_sh_mask.h11868 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT 0xc macro
H A Dgfx_8_0_sh_mask.h13714 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT 0xc macro
H A Dgfx_8_1_sh_mask.h14112 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT 0xc macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21521 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT … macro
H A Dgc_9_1_sh_mask.h22957 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22924 #define SQ_PERFCOUNTER0_SELECT__SQC_BANK_MASK__SHIFT … macro