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Searched refs:SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9270 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK 0x0000f000L macro
H A Dgfx_7_2_sh_mask.h12047 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
H A Dgfx_8_0_sh_mask.h13893 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
H A Dgfx_8_1_sh_mask.h14291 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK 0xf000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21722 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_1_sh_mask.h23158 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK … macro
H A Dgc_9_2_1_sh_mask.h23125 #define SQ_PERFCOUNTER15_SELECT__SQC_BANK_MASK_MASK … macro