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Searched refs:SQ_SOP1__SDST__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9493 #define SQ_SOP1__SDST__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h13098 #define SQ_SOP1__SDST__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h14996 #define SQ_SOP1__SDST__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h15394 #define SQ_SOP1__SDST__SHIFT 0x10 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2801 #define SQ_SOP1__SDST__SHIFT … macro
H A Dgc_9_1_sh_mask.h2750 #define SQ_SOP1__SDST__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2708 #define SQ_SOP1__SDST__SHIFT … macro