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Searched refs:SQ_SOPK__ENCODING_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9514 #define SQ_SOPK__ENCODING_MASK 0xf0000000L macro
H A Dgfx_7_2_sh_mask.h13161 #define SQ_SOPK__ENCODING_MASK 0xf0000000 macro
H A Dgfx_8_0_sh_mask.h15071 #define SQ_SOPK__ENCODING_MASK 0xf0000000 macro
H A Dgfx_8_1_sh_mask.h15469 #define SQ_SOPK__ENCODING_MASK 0xf0000000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2835 #define SQ_SOPK__ENCODING_MASK macro
H A Dgc_9_1_sh_mask.h2784 #define SQ_SOPK__ENCODING_MASK macro
H A Dgc_9_2_1_sh_mask.h2742 #define SQ_SOPK__ENCODING_MASK macro