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Searched refs:SQ_SRC_18_INT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h2954 #define SQ_SRC_18_INT 0x92 macro
H A Dgfx_8_0_enum.h3288 #define SQ_SRC_18_INT 0x92 macro
H A Dgfx_8_1_enum.h3306 #define SQ_SRC_18_INT 0x92 macro
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h17810 #define SQ_SRC_18_INT 0x00000092 macro