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Searched refs:SQ_WAVE_HW_ID__SE_ID_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9880 #define SQ_WAVE_HW_ID__SE_ID_MASK 0x00002000L macro
H A Dgfx_7_2_sh_mask.h12561 #define SQ_WAVE_HW_ID__SE_ID_MASK 0x6000 macro
H A Dgfx_8_0_sh_mask.h14443 #define SQ_WAVE_HW_ID__SE_ID_MASK 0x6000 macro
H A Dgfx_8_1_sh_mask.h14841 #define SQ_WAVE_HW_ID__SE_ID_MASK 0x6000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28336 #define SQ_WAVE_HW_ID__SE_ID_MASK … macro
H A Dgc_9_1_sh_mask.h29676 #define SQ_WAVE_HW_ID__SE_ID_MASK … macro
H A Dgc_9_2_1_sh_mask.h30004 #define SQ_WAVE_HW_ID__SE_ID_MASK … macro