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Searched refs:SXIFCCG_DEBUG_REG0__sx_pending_rd_aux_sel__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10303 #define SXIFCCG_DEBUG_REG0__sx_pending_rd_aux_sel__SHIFT 0x0000001a macro
H A Dgfx_7_2_sh_mask.h7294 #define SXIFCCG_DEBUG_REG0__sx_pending_rd_aux_sel__SHIFT 0x1a macro
H A Dgfx_8_0_sh_mask.h8082 #define SXIFCCG_DEBUG_REG0__sx_pending_rd_aux_sel__SHIFT 0x1a macro
H A Dgfx_8_1_sh_mask.h8636 #define SXIFCCG_DEBUG_REG0__sx_pending_rd_aux_sel__SHIFT 0x1a macro