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Searched refs:TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10497 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0x0000000a macro
H A Dgfx_7_2_sh_mask.h14000 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h15882 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h16462 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21847 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT … macro
H A Dgc_9_1_sh_mask.h23283 #define TA_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT … macro