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Searched refs:TCC_CTRL__SRC_FIFO_SIZE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10648 #define TCC_CTRL__SRC_FIFO_SIZE_MASK 0x0000f000L macro
H A Dgfx_7_2_sh_mask.h13605 #define TCC_CTRL__SRC_FIFO_SIZE_MASK 0xf000 macro
H A Dgfx_8_0_sh_mask.h15535 #define TCC_CTRL__SRC_FIFO_SIZE_MASK 0xf000 macro
H A Dgfx_8_1_sh_mask.h16105 #define TCC_CTRL__SRC_FIFO_SIZE_MASK 0xf000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8988 #define TCC_CTRL__SRC_FIFO_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h10614 #define TCC_CTRL__SRC_FIFO_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h10444 #define TCC_CTRL__SRC_FIFO_SIZE_MASK … macro