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Searched refs:TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10687 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT 0x0000001c macro
H A Dgfx_7_2_sh_mask.h13714 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT 0x1c macro
H A Dgfx_8_0_sh_mask.h15636 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT 0x1c macro
H A Dgfx_8_1_sh_mask.h16206 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT 0x1c macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21976 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
H A Dgc_9_1_sh_mask.h23412 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h23407 #define TCC_PERFCOUNTER1_SELECT1__PERF_MODE3__SHIFT … macro