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Searched refs:TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h14288 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT 0x15 macro
H A Dgfx_8_0_sh_mask.h16188 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT 0x15 macro
H A Dgfx_8_1_sh_mask.h16768 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT 0x15 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8744 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT … macro
H A Dgc_9_1_sh_mask.h10370 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h10200 #define TC_CFG_L1_STORE_POLICY__POLICY_21__SHIFT … macro