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Searched refs:TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h14446 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h16346 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h16926 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT 0x8 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8924 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT … macro
H A Dgc_9_1_sh_mask.h10550 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h10380 #define TC_CFG_L2_ATOMIC_POLICY__POLICY_4__SHIFT … macro