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Searched refs:TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10940 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0x0003fc00L macro
H A Dgfx_7_2_sh_mask.h13895 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0x3fc00 macro
H A Dgfx_8_0_sh_mask.h15771 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0x3fc00 macro
H A Dgfx_8_1_sh_mask.h16345 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0x3fc00 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21863 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_1_sh_mask.h23299 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_2_1_sh_mask.h23298 #define TD_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro