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Searched refs:TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h13905 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK 0x3fc00 macro
H A Dgfx_8_0_sh_mask.h15781 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK 0x3fc00 macro
H A Dgfx_8_1_sh_mask.h16355 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK 0x3fc00 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21883 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_1_sh_mask.h23319 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1_MASK … macro