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Searched refs:TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h13906 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h15782 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h16356 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT 0xa macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21878 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT … macro
H A Dgc_9_1_sh_mask.h23314 #define TD_PERFCOUNTER1_SELECT__PERF_SEL1__SHIFT … macro