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Searched refs:THM_TMON0_RDIL5_DATA__TEMP__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_sh_mask.h387 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0x0000000c macro
H A Dsmu_7_1_1_sh_mask.h3414 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc macro
H A Dsmu_7_0_1_sh_mask.h4206 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc macro
H A Dsmu_7_1_0_sh_mask.h4196 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc macro
H A Dsmu_7_1_2_sh_mask.h4328 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc macro
H A Dsmu_7_1_3_sh_mask.h4026 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT 0xc macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/thm/
H A Dthm_10_0_sh_mask.h202 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT macro
H A Dthm_9_0_sh_mask.h346 #define THM_TMON0_RDIL5_DATA__TEMP__SHIFT macro