Home
last modified time | relevance | path

Searched refs:TRANS_DPLLB_SEL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_display.c4510 sel = TRANS_DPLLB_SEL(pipe); in ironlake_pch_enable()
5526 temp &= ~(TRANS_DPLL_ENABLE(pipe) | TRANS_DPLLB_SEL(pipe)); in ironlake_crtc_disable()
8650 if (tmp & TRANS_DPLLB_SEL(crtc->pipe)) in ironlake_get_pipe_config()
H A Di915_reg.h7307 #define TRANS_DPLLB_SEL(pipe) (1 << ((pipe) * 4)) macro