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Searched refs:UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2707 #define UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_11_0_sh_mask.h2721 #define UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_11_2_sh_mask.h2961 #define UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK 0x2000 macro
H A Ddce_12_0_sh_mask.h9030 #define UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h39776 #define UNIPHYA_LINK_CNTL__UNIPHY_CHANNEL1_INVERT_MASK … macro