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Searched refs:UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2702 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h2716 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h2956 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h9018 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h39764 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT macro