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Searched refs:UVD_GPCOM_VCPU_DATA1 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Duvd_v2_2.c49 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v2_2_fence_emit()
56 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v2_2_fence_emit()
H A Duvd_v1_0.c89 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v1_0_fence_emit()
96 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v1_0_fence_emit()
H A Dradeon_uvd.c662 case UVD_GPCOM_VCPU_DATA1: in radeon_uvd_cs_reg()
753 ib.ptr[2] = PACKET0(UVD_GPCOM_VCPU_DATA1, 0); in radeon_uvd_send_msg()
H A Drv770d.h998 #define UVD_GPCOM_VCPU_DATA1 0xef14 macro
H A Dr600d.h1491 #define UVD_GPCOM_VCPU_DATA1 0xef14 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_uvd.c78 #define UVD_GPCOM_VCPU_DATA1 0x03c5 macro
1055 data[1] = PACKET0(offset[offset_idx] + UVD_GPCOM_VCPU_DATA1, 0); in amdgpu_uvd_send_msg()