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Searched refs:UVD_SUVD_CGC_GATE__ENT_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h241 #define UVD_SUVD_CGC_GATE__ENT_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h444 #define UVD_SUVD_CGC_GATE__ENT_MASK … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvcn_v1_0.c425 | UVD_SUVD_CGC_GATE__ENT_MASK in vcn_v1_0_disable_clock_gating()