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Searched refs:VCE_VCPU_CACHE_OFFSET0__OFFSET_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_sh_mask.h82 #define VCE_VCPU_CACHE_OFFSET0__OFFSET_MASK 0x0fffffffL macro
H A Dvce_2_0_sh_mask.h37 #define VCE_VCPU_CACHE_OFFSET0__OFFSET_MASK 0xfffffff macro
H A Dvce_3_0_sh_mask.h41 #define VCE_VCPU_CACHE_OFFSET0__OFFSET_MASK 0xfffffff macro
H A Dvce_4_0_sh_mask.h48 #define VCE_VCPU_CACHE_OFFSET0__OFFSET_MASK … macro