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Searched refs:VGT_DEBUG_REG15__output_fifo_full_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h11246 #define VGT_DEBUG_REG15__output_fifo_full_MASK 0x00000008L macro
H A Dgfx_7_2_sh_mask.h17257 #define VGT_DEBUG_REG15__output_fifo_full_MASK 0x8 macro
H A Dgfx_8_0_sh_mask.h19567 #define VGT_DEBUG_REG15__output_fifo_full_MASK 0x8 macro
H A Dgfx_8_1_sh_mask.h20169 #define VGT_DEBUG_REG15__output_fifo_full_MASK 0x8 macro