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Searched refs:VGT_DEBUG_REG30__pipe2_rtr_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h11918 #define VGT_DEBUG_REG30__pipe2_rtr_MASK 0x00000080L macro
H A Dgfx_7_2_sh_mask.h17805 #define VGT_DEBUG_REG30__pipe2_rtr_MASK 0x80 macro