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Searched refs:VGT_DEBUG_REG33__ring3_in_sync_q__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h12113 #define VGT_DEBUG_REG33__ring3_in_sync_q__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h17990 #define VGT_DEBUG_REG33__ring3_in_sync_q__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h20248 #define VGT_DEBUG_REG33__ring3_in_sync_q__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h20850 #define VGT_DEBUG_REG33__ring3_in_sync_q__SHIFT 0xd macro